The present invention relates to a method for calibrating analog-to-digital converting circuits, and more particularly, to a method for calibrating analog-to-digital converting circuits in a wafer level probe testing process or a chip level testing process.
A video system has three channels, respectively known as red channel, green channel and blue channel. Each of the channels includes an analog-to-digital converter (ADC), and the channels are used, respectively, to receive red, green and blue signals and perform analog-to-digital converting operations on the red, green and blue signals to generate red, green and blue digital codes.
Theoretically, the ADCs in the red, green and blue channels should output the same digital codes when receiving input signals with the same analog color level. However, due to semiconductor process variations, the ADCs in different channels may require different gains to output the same digital codes. Therefore, the gains of the ADCs need to be calibrated. Generally, this calibration step proceeds in a production line by a machine that is dedicated for the calibration; that is, the calibration proceeds in a system level. Therefore, large amounts of manpower and time are required, and cost of the production line is increased.